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Question: Consider adding a register-memory addressing mode for source operands of ALU instructions to a load-store machine. The idea is to replace sequences of LOAD R1, 0(Rb) # R1 = MEM[0 + Rb] ADD R2, R1, R2 # R2 = R1 + R2 by the single instruction – Free Chegg Question Answer

Consider adding a register-memory addressing mode for source operands of ALU instructions to a load-store machine. The idea is to replace sequences of
LOAD R1, 0(Rb) # R1 = MEM[0 + Rb]
ADD R2, R1, R2 # R2 = R1 + R2
by the single instruction
ADD R2, 0(Rb) # R2 = R2 + MEM[0+Rb]
Assume that the new instruction will cause the clock cycle of the processor to increase by 5%. Answer the following using the instruction mix:
40% ALU, 25% Jumps, 20% Load, 10% Store, 5% Other
(a) What percentage of loads must be eliminated for the machine with the new instruction to have at least the same performance as original? Hint: use the Iron Law.
(b) Can this replacement be applied for all sequences of load followed by an ALU
operation of the loaded value, or is there a situation where this cannot be used?

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a) According to Iron law, 100% of loads must be eliminated for the machine with the new instruction to have at least the same performance as original

b) No Replacement can be applied for all sequences of load followed by an ALU operation of the loaded value


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